In computer systems with processors, busy-waits are often used when waiting for user input or for synchronization between a plurality of processors (or a plurality of logic processors, processes, threads, or the like) operating in parallel. When a busy-wait is performed, a loop is executed in a processor to repeatedly check, for example, on a specific variable (such as a synchronization variable). Once the value of the specific variable changes to a predetermined value, the loop terminates, and the intended processing is performed.
In the case of a plurality of processors or the like operating in parallel, use of a busy-wait thus allows for one process to begin after another process finishes. Busy-waits are therefore widely used in computer systems.
Busy-waits have the demerit, however, of wasting processor resources. For example, the loop for repeatedly checking a synchronization variable may be executed from several hundred to tens of thousands of times or more. Therefore, a busy-wait is a wasteful control method from the perspective of power consumption.
To address this problem, Patent Literature 1 discloses a method for reducing wasted power consumption during a spin-wait, a type of busy-wait.
The following describes spin-waits with reference to FIG. 33. A spin-wait is used, for example, during synchronous processing in a multiprocessor. In FIG. 33, it is assumed that two processors are executing, in order, an earlier stage and a later stage of a process. A setting unit 1101 in the first processor, a verification unit 1102 in the second processor, and a synchronization variable 1110 form a spinlock (a type of interlock).
After writing a value of “0” into the synchronization variable 1110, the setting unit 1101 in the first processor performs step S1111 of the earlier stage. Upon completing step S1111 of the earlier stage, the first processor writes a value of “1” into the synchronization variable 1110. On the other hand, the verification unit 1102 of the second processor cannot start performing step S1122 for the later stage until the value of the synchronization variable 1110 becomes “1”. Accordingly, the verification unit 1102 waits while repeating the determination in step S1121 until the value of the synchronization variable 1110 becomes “1” (in other words, the verification unit 1102 repeats a loop while waiting). This condition is referred to as “spinning” and is a waste of power.
Patent Literature 1 discloses a method wherein a computer detects when the processor executes an instruction sequence including a spin-wait, in which case the computer sets the processor to a power saving state. The method for detecting a spin-wait instruction is described next with reference to FIG. 34. FIG. 34 shows the structure of a spin-wait detection unit disclosed in Patent Literature 1.
A spin-wait detection unit 1222 includes an executed instruction sequence buffer 1234 for the processor, a spin-wait instruction sequence storage unit 1236, and a comparison unit 1238 that compares the instruction sequences in the executed instruction sequence buffer 1234 and the spin-wait instruction sequence storage unit 1236. The spin-wait instruction sequence storage unit 1236 stores interlock instruction sequences that are unique for spin-waits (such as test_and_set or compare_and_swap). The comparison unit 1238 outputs a spin-wait instruction detected signal 1241 upon detecting that an interlock instruction sequence stored in the instruction sequence storage unit 1236 is included in the executed instruction sequence buffer 1234. The processor treats the spin-wait instruction detected signal 1241 as a trigger for entering the power saving state.